On the System-Level Design of Noise-Shaping SAR Analog-to-Digital Converters

Abstract

In this work, the system-level design of noise-shaping (NS) successive-approximation (SAR) analog-to-digital converters (ADCs) is investigated and analyzed. It is shown that despite the fact that the NS SAR architecture shares the same fundamental NS principle with the ΣΔ architecture, there are a few implementation differences that imply different considerations for optimum system-level design, particularly in the selection of the system oversampling ratio (OSR) and consequent resolution of the associated digital-to-analog converter (DAC) for a certain target overall resolution. In addition, the impacts of the OSR value on the power dissipation and figure-of-merit (FOM) are addressed in details.