article · International Journal of Online and Biomedical Engineering (iJOE)
Phase-locked loop (PLL) is one of the main components ofmodern electronic design and has been around for a considerable numberof years. It is a technique that has greatly contributed to the technological advancement of communications and control systems. This paperpresents a phase-locked loop tutorial based on a control system, it givesa concise review of basic concepts, the different types of PLLs, linearanalysis approaches of analog systems PLL is discussed, furthermore thetheoretical analysis of the steady-state error in detail is presented, and itssimulations of different phase offset values in C program are presented,and show how the response of the loop changes.
This page summarises published work. The authoritative version sits with the publisher.
DOI: 10.3991/ijoe.v18i13.33419
Is something wrong with this record? Report it or request removal.
Discussion
Have you built on this work, tried to replicate it, or seen it applied in practice? Share what you know. Verified researchers and MARATTO™ domain experts can open a discussion, and any member can reply. Contributions are reviewed before they appear.
No discussion yet. Open the first thread.
New to MARATTO™? Create a free account.