Apply Balancing Technique Utilizing Standard Cells Decoupling Caps to Mitigate Side-Channel Attacks

Abstract

Side Channel Attacks pose a significant threat to integrated circuits (ICs) security by exploiting power consumption or electromagnetic emissions to extract sensitive information. Over the past two decades, various countermeasures have been proposed across software, logic, and circuit levels. As encryption algorithms are realized using digital logic gates -known as standard cells (stdcells)- their implementations can easily involve thousands of cells. To handle such complexity, Auto Place & Route (APR) tools are employed for physical circuit design. A critical step in APR is chip finishing, where non-metal fillers and decoupling capacitances (decaps) are added to fill empty spaces, ensure well continuity, and mitigate supply noise and voltage fluctuations. This paper explores an approach to balance the power signal and counteract power-based SCA by leveraging the capacitance provided by stdcell decaps. We evaluated our method using X-or encryption. Our proposed technique reduces the correlation and conceals the encryption key at the expense of area and leakage power.