article · Electronics
This paper introduces a novel approach to address thermal management challenges in system-in-package (SiP) technology, which is a significant concern in various advanced technologies. The main objective is to assess the electrical and thermal performance of the SiP model by utilizing Chip Cooling Laminate Chip (CCLC) technology. To achieve this, we employed finite element method (FEM) analysis using COMSOL Multiphysics® and MATLAB® to compare the results of electrical and thermal SiP models with and without CCLC technology. The numerical simulations revealed that, as opposed to the traditional model, the temperature variation decreased significantly with a uniform temperature distribution when employing the CCLC technology. Additionally, the thermal conduction performance of the packaging system using CCLC demonstrated remarkable reliability and resolution with cost-effective micro-devices, particularly in micro-medicine applications. The analysis of the electrical and thermal models reported a maximum error between them of 1.15 ∘C.
This page summarises published work. The authoritative version sits with the publisher.
DOI: 10.3390/electronics12143154
Is something wrong with this record? Report it or request removal.
Discussion
Have you built on this work, tried to replicate it, or seen it applied in practice? Share what you know. Verified researchers and MARATTO™ domain experts can open a discussion, and any member can reply. Contributions are reviewed before they appear.
No discussion yet. Open the first thread.
New to MARATTO™? Create a free account.
