A novel approach for design energy efficient inexact reverse carry select adders for IoT applications

Abstract

Low cost, low form factor and highly energy efficient VLSI design is the key for the success of internet of things (IoT) paradigm. Approximate computing is one of the major techniques used to achieve high performance and energy efficiency in error resistant computationally intense applications. Low power VLSI design is one of the important factors in the designing of new IoT system or reconstructing the existed IoT system. An inexact reverse carry select adder (IRCSLA) with back carry propagation is presented in this work. Three different types of adder implementations were presented in IRCSLA. The method of back carry propagation is applied to the design of both 16-bit ripple carry adder (RCA) & 16-bit carry select adders. These adders were designed in CADENCE schematic tool and simulations were done in Analog Design Environment with 45 nm CMOS technology. The design parameters such as delay and power of the three IRCSLA designs were compared with the existed back carry propagate full adders. IRCSLA-III gives 34.84% reduction in power and 56.91% improvement in delay compared to conventional CSLA adder and also improves the energy at the rate of 86.77% and 71.92% compared to the conventional RCA and a CSLA adder respectively.